Update Linux from version 6.1.15 to 6.1.16.

main inf-kernel-0.0.0.15
inference 3 months ago
parent 08df0385a0
commit 31bf5ed9ca
Signed by: inference
SSH Key Fingerprint: SHA256:9Pl0nZ2UJacgm+IeEtLSZ4FOESgP1eKCtRflfPfdX9M

@ -86,6 +86,8 @@ Brief summary of control files.
memory.swappiness set/show swappiness parameter of vmscan
(See sysctl's vm.swappiness)
memory.move_charge_at_immigrate set/show controls of moving charges
This knob is deprecated and shouldn't be
used.
memory.oom_control set/show oom controls.
memory.numa_stat show the number of memory usage per numa
node
@ -716,8 +718,15 @@ NOTE2:
It is recommended to set the soft limit always below the hard limit,
otherwise the hard limit will take precedence.
8. Move charges at task migration
=================================
8. Move charges at task migration (DEPRECATED!)
===============================================
THIS IS DEPRECATED!
It's expensive and unreliable! It's better practice to launch workload
tasks directly from inside their target cgroup. Use dedicated workload
cgroups to allow fine-grained policy adjustments without having to
move physical pages between control domains.
Users can move charges associated with a task along with task migration, that
is, uncharge task's pages from the old cgroup and charge them to the new cgroup.

@ -479,8 +479,16 @@ Spectre variant 2
On Intel Skylake-era systems the mitigation covers most, but not all,
cases. See :ref:`[3] <spec_ref3>` for more details.
On CPUs with hardware mitigation for Spectre variant 2 (e.g. Enhanced
IBRS on x86), retpoline is automatically disabled at run time.
On CPUs with hardware mitigation for Spectre variant 2 (e.g. IBRS
or enhanced IBRS on x86), retpoline is automatically disabled at run time.
Systems which support enhanced IBRS (eIBRS) enable IBRS protection once at
boot, by setting the IBRS bit, and they're automatically protected against
Spectre v2 variant attacks, including cross-thread branch target injections
on SMT systems (STIBP). In other words, eIBRS enables STIBP too.
Legacy IBRS systems clear the IBRS bit on exit to userspace and
therefore explicitly enable STIBP for that
The retpoline mitigation is turned on by default on vulnerable
CPUs. It can be forced on or off by the administrator
@ -504,9 +512,12 @@ Spectre variant 2
For Spectre variant 2 mitigation, individual user programs
can be compiled with return trampolines for indirect branches.
This protects them from consuming poisoned entries in the branch
target buffer left by malicious software. Alternatively, the
programs can disable their indirect branch speculation via prctl()
(See :ref:`Documentation/userspace-api/spec_ctrl.rst <set_spec_ctrl>`).
target buffer left by malicious software.
On legacy IBRS systems, at return to userspace, implicit STIBP is disabled
because the kernel clears the IBRS bit. In this case, the userspace programs
can disable indirect branch speculation via prctl() (See
:ref:`Documentation/userspace-api/spec_ctrl.rst <set_spec_ctrl>`).
On x86, this will turn on STIBP to guard against attacks from the
sibling thread when the user program is running, and use IBPB to
flush the branch target buffer when switching to/from the program.

@ -312,10 +312,10 @@ define dmesg
set var $prev_flags = $info->flags
end
set var $id = ($id + 1) & $id_mask
if ($id == $end_id)
loop_break
end
set var $id = ($id + 1) & $id_mask
end
end
document dmesg

@ -99,19 +99,26 @@ code value description
BPF_ADD 0x00 dst += src
BPF_SUB 0x10 dst -= src
BPF_MUL 0x20 dst \*= src
BPF_DIV 0x30 dst /= src
BPF_DIV 0x30 dst = (src != 0) ? (dst / src) : 0
BPF_OR 0x40 dst \|= src
BPF_AND 0x50 dst &= src
BPF_LSH 0x60 dst <<= src
BPF_RSH 0x70 dst >>= src
BPF_NEG 0x80 dst = ~src
BPF_MOD 0x90 dst %= src
BPF_MOD 0x90 dst = (src != 0) ? (dst % src) : dst
BPF_XOR 0xa0 dst ^= src
BPF_MOV 0xb0 dst = src
BPF_ARSH 0xc0 sign extending shift right
BPF_END 0xd0 byte swap operations (see `Byte swap instructions`_ below)
======== ===== ==========================================================
Underflow and overflow are allowed during arithmetic operations, meaning
the 64-bit or 32-bit value will wrap. If eBPF program execution would
result in division by zero, the destination register is instead set to zero.
If execution would result in modulo by zero, for ``BPF_ALU64`` the value of
the destination register is unchanged whereas for ``BPF_ALU`` the upper
32 bits of the destination register are zeroed.
``BPF_ADD | BPF_X | BPF_ALU`` means::
dst_reg = (u32) dst_reg + (u32) src_reg;
@ -128,6 +135,11 @@ BPF_END 0xd0 byte swap operations (see `Byte swap instructions`_ below)
src_reg = src_reg ^ imm32
Also note that the division and modulo operations are unsigned. Thus, for
``BPF_ALU``, 'imm' is first interpreted as an unsigned 32-bit value, whereas
for ``BPF_ALU64``, 'imm' is first sign extended to 64 bits and the result
interpreted as an unsigned 64-bit value. There are no instructions for
signed division or modulo.
Byte swap instructions
~~~~~~~~~~~~~~~~~~~~~~

@ -39,6 +39,10 @@ Setup
this mode. In this case, you should build the kernel with
CONFIG_RANDOMIZE_BASE disabled if the architecture supports KASLR.
- Build the gdb scripts (required on kernels v5.1 and above)::
make scripts_gdb
- Enable the gdb stub of QEMU/KVM, either
- at VM startup time by appending "-s" to the QEMU command line

@ -32,7 +32,7 @@ properties:
- items:
- enum:
- mediatek,mt8186-disp-ccorr
- const: mediatek,mt8183-disp-ccorr
- const: mediatek,mt8192-disp-ccorr
reg:
maxItems: 1

@ -62,7 +62,7 @@ patternProperties:
description: phandle of the CPU DAI
patternProperties:
"^codec-[0-9]+$":
"^codec(-[0-9]+)?$":
type: object
additionalProperties: false
description: |-

@ -22,6 +22,10 @@ enhancements. It can monitor up to 4 voltages, 16 temperatures and
8 fans. It also contains an integrated watchdog which is currently
implemented in this driver.
The 4 voltages require a board-specific multiplier, since the BMC can
only measure voltages up to 3.3V and thus relies on voltage dividers.
Consult your motherboard manual for details.
To clear a temperature or fan alarm, execute the following command with the
correct path to the alarm file::

@ -4483,6 +4483,18 @@ not holding a previously reported uncorrected error).
:Parameters: struct kvm_s390_cmma_log (in, out)
:Returns: 0 on success, a negative value on error
Errors:
====== =============================================================
ENOMEM not enough memory can be allocated to complete the task
ENXIO if CMMA is not enabled
EINVAL if KVM_S390_CMMA_PEEK is not set but migration mode was not enabled
EINVAL if KVM_S390_CMMA_PEEK is not set but dirty tracking has been
disabled (and thus migration mode was automatically disabled)
EFAULT if the userspace address is invalid or if no page table is
present for the addresses (e.g. when using hugepages).
====== =============================================================
This ioctl is used to get the values of the CMMA bits on the s390
architecture. It is meant to be used in two scenarios:
@ -4563,12 +4575,6 @@ mask is unused.
values points to the userspace buffer where the result will be stored.
This ioctl can fail with -ENOMEM if not enough memory can be allocated to
complete the task, with -ENXIO if CMMA is not enabled, with -EINVAL if
KVM_S390_CMMA_PEEK is not set but migration mode was not enabled, with
-EFAULT if the userspace address is invalid or if no page table is
present for the addresses (e.g. when using hugepages).
4.108 KVM_S390_SET_CMMA_BITS
----------------------------

@ -302,6 +302,10 @@ Allows userspace to start migration mode, needed for PGSTE migration.
Setting this attribute when migration mode is already active will have
no effects.
Dirty tracking must be enabled on all memslots, else -EINVAL is returned. When
dirty tracking is disabled on any memslot, migration mode is automatically
stopped.
:Parameters: none
:Returns: -ENOMEM if there is not enough free memory to start migration mode;
-EINVAL if the state of the VM is invalid (e.g. no memory defined);

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 1
SUBLEVEL = 15
SUBLEVEL = 16
EXTRAVERSION =
NAME = Hurr durr I'ma ninja sloth
@ -93,10 +93,17 @@ endif
# If the user is running make -s (silent mode), suppress echoing of
# commands
# make-4.0 (and later) keep single letter options in the 1st word of MAKEFLAGS.
ifneq ($(findstring s,$(filter-out --%,$(MAKEFLAGS))),)
quiet=silent_
KBUILD_VERBOSE = 0
ifeq ($(filter 3.%,$(MAKE_VERSION)),)
silence:=$(findstring s,$(firstword -$(MAKEFLAGS)))
else
silence:=$(findstring s,$(filter-out --%,$(MAKEFLAGS)))
endif
ifeq ($(silence),s)
quiet=silent_
KBUILD_VERBOSE = 0
endif
export quiet Q KBUILD_VERBOSE

@ -148,7 +148,7 @@ main (int argc, char *argv[])
#ifdef __ELF__
elf = (struct elfhdr *) buf;
if (elf->e_ident[0] == 0x7f && str_has_prefix((char *)elf->e_ident + 1, "ELF")) {
if (memcmp(&elf->e_ident[EI_MAG0], ELFMAG, SELFMAG) == 0) {
if (elf->e_type != ET_EXEC) {
fprintf(stderr, "%s: %s is not an ELF executable\n",
prog_name, inname);

@ -233,7 +233,21 @@ do_entIF(unsigned long type, struct pt_regs *regs)
{
int signo, code;
if ((regs->ps & ~IPL_MAX) == 0) {
if (type == 3) { /* FEN fault */
/* Irritating users can call PAL_clrfen to disable the
FPU for the process. The kernel will then trap in
do_switch_stack and undo_switch_stack when we try
to save and restore the FP registers.
Given that GCC by default generates code that uses the
FP registers, PAL_clrfen is not useful except for DoS
attacks. So turn the bleeding FPU back on and be done
with it. */
current_thread_info()->pcb.flags |= 1;
__reload_thread(&current_thread_info()->pcb);
return;
}
if (!user_mode(regs)) {
if (type == 1) {
const unsigned int *data
= (const unsigned int *) regs->pc;
@ -366,20 +380,6 @@ do_entIF(unsigned long type, struct pt_regs *regs)
}
break;
case 3: /* FEN fault */
/* Irritating users can call PAL_clrfen to disable the
FPU for the process. The kernel will then trap in
do_switch_stack and undo_switch_stack when we try
to save and restore the FP registers.
Given that GCC by default generates code that uses the
FP registers, PAL_clrfen is not useful except for DoS
attacks. So turn the bleeding FPU back on and be done
with it. */
current_thread_info()->pcb.flags |= 1;
__reload_thread(&current_thread_info()->pcb);
return;
case 5: /* illoc */
default: /* unexpected instruction-fault type */
;

@ -250,7 +250,7 @@
i80-if-timings {
cs-setup = <0>;
wr-setup = <0>;
wr-act = <1>;
wr-active = <1>;
wr-hold = <0>;
};
};

@ -10,7 +10,7 @@
/ {
thermal-zones {
cpu_thermal: cpu-thermal {
thermal-sensors = <&tmu 0>;
thermal-sensors = <&tmu>;
polling-delay-passive = <0>;
polling-delay = <0>;
trips {

@ -605,7 +605,7 @@
status = "disabled";
hdmi_i2c_phy: hdmiphy@38 {
compatible = "exynos4210-hdmiphy";
compatible = "samsung,exynos4210-hdmiphy";
reg = <0x38>;
};
};

@ -393,7 +393,6 @@
&cpu_thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tmu 0>;
};
&gic {

@ -1107,7 +1107,7 @@
&cpu_thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tmu 0>;
thermal-sensors = <&tmu>;
cooling-maps {
map0 {

@ -120,7 +120,6 @@
};
&cpu0_thermal {
thermal-sensors = <&tmu_cpu0 0>;
polling-delay-passive = <0>;
polling-delay = <0>;

@ -592,7 +592,7 @@
};
mipi_phy: mipi-video-phy {
compatible = "samsung,s5pv210-mipi-video-phy";
compatible = "samsung,exynos5420-mipi-video-phy";
syscon = <&pmu_system_controller>;
#phy-cells = <1>;
};

@ -31,7 +31,7 @@
thermal-zones {
cpu0_thermal: cpu0-thermal {
thermal-sensors = <&tmu_cpu0 0>;
thermal-sensors = <&tmu_cpu0>;
trips {
cpu0_alert0: cpu-alert-0 {
temperature = <70000>; /* millicelsius */
@ -86,7 +86,7 @@
};
};
cpu1_thermal: cpu1-thermal {
thermal-sensors = <&tmu_cpu1 0>;
thermal-sensors = <&tmu_cpu1>;
trips {
cpu1_alert0: cpu-alert-0 {
temperature = <70000>;
@ -130,7 +130,7 @@
};
};
cpu2_thermal: cpu2-thermal {
thermal-sensors = <&tmu_cpu2 0>;
thermal-sensors = <&tmu_cpu2>;
trips {
cpu2_alert0: cpu-alert-0 {
temperature = <70000>;
@ -174,7 +174,7 @@
};
};
cpu3_thermal: cpu3-thermal {
thermal-sensors = <&tmu_cpu3 0>;
thermal-sensors = <&tmu_cpu3>;
trips {
cpu3_alert0: cpu-alert-0 {
temperature = <70000>;
@ -218,7 +218,7 @@
};
};
gpu_thermal: gpu-thermal {
thermal-sensors = <&tmu_gpu 0>;
thermal-sensors = <&tmu_gpu>;
trips {
gpu_alert0: gpu-alert-0 {
temperature = <70000>;

@ -50,7 +50,7 @@
thermal-zones {
cpu0_thermal: cpu0-thermal {
thermal-sensors = <&tmu_cpu0 0>;
thermal-sensors = <&tmu_cpu0>;
polling-delay-passive = <250>;
polling-delay = <0>;
trips {
@ -139,7 +139,7 @@
};
};
cpu1_thermal: cpu1-thermal {
thermal-sensors = <&tmu_cpu1 0>;
thermal-sensors = <&tmu_cpu1>;
polling-delay-passive = <250>;
polling-delay = <0>;
trips {
@ -212,7 +212,7 @@
};
};
cpu2_thermal: cpu2-thermal {
thermal-sensors = <&tmu_cpu2 0>;
thermal-sensors = <&tmu_cpu2>;
polling-delay-passive = <250>;
polling-delay = <0>;
trips {
@ -285,7 +285,7 @@
};
};
cpu3_thermal: cpu3-thermal {
thermal-sensors = <&tmu_cpu3 0>;
thermal-sensors = <&tmu_cpu3>;
polling-delay-passive = <250>;
polling-delay = <0>;
trips {
@ -358,7 +358,7 @@
};
};
gpu_thermal: gpu-thermal {
thermal-sensors = <&tmu_gpu 0>;
thermal-sensors = <&tmu_gpu>;
polling-delay-passive = <250>;
polling-delay = <0>;
trips {

@ -513,7 +513,7 @@
mux: mux-controller {
compatible = "mmio-mux";
#mux-control-cells = <0>;
#mux-control-cells = <1>;
mux-reg-masks = <0x14 0x00000010>;
};

@ -577,7 +577,7 @@
};
apps_smmu: iommu@15000000 {
compatible = "qcom,sdx55-smmu-500", "arm,mmu-500";
compatible = "qcom,sdx55-smmu-500", "qcom,smmu-500", "arm,mmu-500";
reg = <0x15000000 0x20000>;
#iommu-cells = <2>;
#global-interrupts = <1>;

@ -455,7 +455,7 @@
};
apps_smmu: iommu@15000000 {
compatible = "qcom,sdx65-smmu-500", "arm,mmu-500";
compatible = "qcom,sdx65-smmu-500", "qcom,smmu-500", "arm,mmu-500";
reg = <0x15000000 0x40000>;
#iommu-cells = <2>;
#global-interrupts = <1>;

@ -405,6 +405,7 @@
part_number_otp: part_number_otp@4 {
reg = <0x4 0x2>;
bits = <0 12>;
};
ts_cal1: calib@5c {
reg = <0x5c 0x2>;

@ -57,7 +57,7 @@
regulator-ramp-delay = <50>; /* 4ms */
enable-active-high;
enable-gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
enable-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
gpios-states = <0x1>;
states = <1100000 0>, <1300000 1>;

@ -107,6 +107,7 @@ CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_DRM=y
CONFIG_DRM_V3D=y
CONFIG_DRM_VC4=y
CONFIG_FB=y
CONFIG_FB_SIMPLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_SOUND=y

@ -99,6 +99,7 @@ struct mmdc_pmu {
cpumask_t cpu;
struct hrtimer hrtimer;
unsigned int active_events;
int id;
struct device *dev;
struct perf_event *mmdc_events[MMDC_NUM_COUNTERS];
struct hlist_node node;
@ -433,8 +434,6 @@ static enum hrtimer_restart mmdc_pmu_timer_handler(struct hrtimer *hrtimer)
static int mmdc_pmu_init(struct mmdc_pmu *pmu_mmdc,
void __iomem *mmdc_base, struct device *dev)
{
int mmdc_num;
*pmu_mmdc = (struct mmdc_pmu) {
.pmu = (struct pmu) {
.task_ctx_nr = perf_invalid_context,
@ -452,15 +451,16 @@ static int mmdc_pmu_init(struct mmdc_pmu *pmu_mmdc,
.active_events = 0,
};
mmdc_num = ida_simple_get(&mmdc_ida, 0, 0, GFP_KERNEL);
pmu_mmdc->id = ida_simple_get(&mmdc_ida, 0, 0, GFP_KERNEL);
return mmdc_num;
return pmu_mmdc->id;
}
static int imx_mmdc_remove(struct platform_device *pdev)
{
struct mmdc_pmu *pmu_mmdc = platform_get_drvdata(pdev);
ida_simple_remove(&mmdc_ida, pmu_mmdc->id);
cpuhp_state_remove_instance_nocalls(cpuhp_mmdc_state, &pmu_mmdc->node);
perf_pmu_unregister(&pmu_mmdc->pmu);
iounmap(pmu_mmdc->mmdc_base);
@ -474,7 +474,6 @@ static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_b
{
struct mmdc_pmu *pmu_mmdc;
char *name;
int mmdc_num;
int ret;
const struct of_device_id *of_id =
of_match_device(imx_mmdc_dt_ids, &pdev->dev);
@ -497,14 +496,14 @@ static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_b
cpuhp_mmdc_state = ret;
}
mmdc_num = mmdc_pmu_init(pmu_mmdc, mmdc_base, &pdev->dev);
pmu_mmdc->mmdc_ipg_clk = mmdc_ipg_clk;
if (mmdc_num == 0)
name = "mmdc";
else
name = devm_kasprintf(&pdev->dev,
GFP_KERNEL, "mmdc%d", mmdc_num);
ret = mmdc_pmu_init(pmu_mmdc, mmdc_base, &pdev->dev);
if (ret < 0)
goto pmu_free;
name = devm_kasprintf(&pdev->dev,
GFP_KERNEL, "mmdc%d", ret);
pmu_mmdc->mmdc_ipg_clk = mmdc_ipg_clk;
pmu_mmdc->devtype_data = (struct fsl_mmdc_devtype_data *)of_id->data;
hrtimer_init(&pmu_mmdc->hrtimer, CLOCK_MONOTONIC,
@ -525,6 +524,7 @@ static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_b
pmu_register_err:
pr_warn("MMDC Perf PMU failed (%d), disabled\n", ret);
ida_simple_remove(&mmdc_ida, pmu_mmdc->id);
cpuhp_state_remove_instance_nocalls(cpuhp_mmdc_state, &pmu_mmdc->node);
hrtimer_cancel(&pmu_mmdc->hrtimer);
pmu_free:

@ -158,7 +158,7 @@ err_free_pdata:
kfree(pdata);
err_free_pdev:
platform_device_unregister(pdev);
platform_device_put(pdev);
return ret;
}

@ -140,6 +140,7 @@ static int __init omap4_sram_init(void)
__func__);
else
sram_sync = (void __iomem *)gen_pool_alloc(sram_pool, PAGE_SIZE);
of_node_put(np);
return 0;
}

@ -76,6 +76,7 @@ static void __init realtime_counter_init(void)
}
rate = clk_get_rate(sys_clk);
clk_put(sys_clk);
if (soc_is_dra7xx()) {
/*

@ -173,7 +173,8 @@ static struct samsung_pwm_variant s3c64xx_pwm_variant = {
.tclk_mask = (1 << 7) | (1 << 6) | (1 << 5),
};
void __init s3c64xx_set_timer_source(unsigned int event, unsigned int source)
void __init s3c64xx_set_timer_source(enum s3c64xx_timer_mode event,
enum s3c64xx_timer_mode source)
{
s3c64xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
s3c64xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));

@ -213,6 +213,7 @@ int __init zynq_early_slcr_init(void)
zynq_slcr_regmap = syscon_regmap_lookup_by_compatible("xlnx,zynq-slcr");
if (IS_ERR(zynq_slcr_regmap)) {
pr_err("%s: failed to find zynq-slcr\n", __func__);
of_node_put(np);
return -ENODEV;
}

@ -98,7 +98,6 @@ config ARM64
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
select ARCH_WANT_FRAME_POINTERS
select ARCH_WANT_HUGE_PMD_SHARE if ARM64_4K_PAGES || (ARM64_16K_PAGES && !ARM64_VA_BITS_36)
select ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
select ARCH_WANT_LD_ORPHAN_WARN
select ARCH_WANTS_NO_INSTR
select ARCH_WANTS_THP_SWAP if ARM64_4K_PAGES

@ -168,15 +168,15 @@
reg = <0x32 0x20>;
};
eth_mac: eth_mac@0 {
eth_mac: eth-mac@0 {
reg = <0x0 0x6>;
};
bt_mac: bt_mac@6 {
bt_mac: bt-mac@6 {
reg = <0x6 0x6>;
};
wifi_mac: wifi_mac@c {
wifi_mac: wifi-mac@c {
reg = <0xc 0x6>;
};
@ -217,7 +217,7 @@
pinctrl-names = "default";
/* RTC */
pcf8563: pcf8563@51 {
pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
status = "okay";
@ -303,7 +303,7 @@
&usb {
status = "okay";
phy-supply = <&usb_pwr>;
vbus-supply = <&usb_pwr>;
};
&spicc1 {

@ -152,7 +152,7 @@
scpi_clocks: clocks {
compatible = "arm,scpi-clocks";
scpi_dvfs: clock-controller {
scpi_dvfs: clocks-0 {
compatible = "arm,scpi-dvfs-clocks";
#clock-cells = <1>;
clock-indices = <0>;
@ -161,7 +161,7 @@
};
scpi_sensors: sensors {
compatible = "amlogic,meson-gxbb-scpi-sensors";
compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
#thermal-sensor-cells = <1>;
};
};

@ -1694,7 +1694,7 @@
#address-cells = <1>;
#size-cells = <0>;
internal_ephy: ethernet_phy@8 {
internal_ephy: ethernet-phy@8 {
compatible = "ethernet-phy-id0180.3301",
"ethernet-phy-ieee802.3-c22";
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;

@ -401,5 +401,4 @@
&usb {
status = "okay";
dr_mode = "host";
};

@ -57,26 +57,6 @@
compatible = "operating-points-v2";
opp-shared;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <731000>;
};
opp-250000000 {
opp-hz = /bits/ 64 <250000000>;
opp-microvolt = <731000>;
};
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <731000>;
};
opp-667000000 {
opp-hz = /bits/ 64 <666666666>;
opp-microvolt = <731000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <731000>;

@ -17,7 +17,7 @@
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
update-button {
button-update {
label = "update";
linux,code = <KEY_VENDOR>;
press-threshold-microvolt = <1300000>;

@ -232,7 +232,7 @@
reg = <0x14 0x10>;
};
eth_mac: eth_mac@34 {
eth_mac: eth-mac@34 {
reg = <0x34 0x10>;
};
@ -249,7 +249,7 @@
scpi_clocks: clocks {
compatible = "arm,scpi-clocks";
scpi_dvfs: scpi_clocks@0 {
scpi_dvfs: clocks-0 {
compatible = "arm,scpi-dvfs-clocks";
#clock-cells = <1>;
clock-indices = <0>;
@ -531,7 +531,7 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
hwrng: rng {
hwrng: rng@0 {
compatible = "amlogic,meson-rng";
reg = <0x0 0x0 0x0 0x4>;
};

@ -16,7 +16,7 @@
leds {
compatible = "gpio-leds";
status {
led {
gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
default-state = "off";
color = <LED_COLOR_ID_RED>;

@ -18,7 +18,7 @@
leds {
compatible = "gpio-leds";
status {
led {
label = "n1:white:status";
gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
default-state = "on";

@ -79,6 +79,5 @@
enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
clocks = <&wifi32k>;
clock-names = "lpo";
};
};

@ -86,11 +86,11 @@
};
&efuse {
bt_mac: bt_mac@6 {
bt_mac: bt-mac@6 {
reg = <0x6 0x6>;
};
wifi_mac: wifi_mac@C {
wifi_mac: wifi-mac@c {
reg = <0xc 0x6>;
};
};
@ -239,7 +239,7 @@
pinctrl-names = "default";
pinctrl-0 = <&i2c_b_pins>;
pcf8563: pcf8563@51 {
pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
status = "okay";

@ -759,7 +759,7 @@
};
};
eth-phy-mux {
eth-phy-mux@55c {
compatible = "mdio-mux-mmioreg", "mdio-mux";
#address-cells = <1>;
#size-cells = <0>;

@ -17,13 +17,13 @@
compatible = "bananapi,bpi-m5", "amlogic,sm1";
model = "Banana Pi BPI-M5";
adc_keys {
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 2>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
key {
button-sw3 {
label = "SW3";
linux,code = <BTN_3>;
press-threshold-microvolt = <1700000>;
@ -123,7 +123,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
enable-gpio = <&gpio_ao GPIOE_2 GPIO_ACTIVE_HIGH>;
enable-gpio = <&gpio_ao GPIOE_2 GPIO_OPEN_DRAIN>;
enable-active-high;
regulator-always-on;

@ -76,9 +76,17 @@
};
&cpu_thermal {
trips {
cpu_active: cpu-active {
temperature = <60000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "active";
};
};
cooling-maps {
map {
trip = <&cpu_passive>;
trip = <&cpu_active>;
cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};

@ -562,7 +562,7 @@
#address-cells = <1>;
#size-cells = <1>;
imx8mm_uid: unique-id@410 {
imx8mm_uid: unique-id@4 {
reg = <0x4 0x8>;
};

@ -563,7 +563,7 @@
#address-cells = <1>;
#size-cells = <1>;
imx8mn_uid: unique-id@410 {
imx8mn_uid: unique-id@4 {
reg = <0x4 0x8>;
};

@ -424,7 +424,7 @@
#address-cells = <1>;
#size-cells = <1>;
imx8mp_uid: unique-id@420 {
imx8mp_uid: unique-id@8 {
reg = <0x8 0x8>;
};

@ -592,7 +592,7 @@
#address-cells = <1>;
#size-cells = <1>;
imx8mq_uid: soc-uid@410 {
imx8mq_uid: soc-uid@4 {
reg = <0x4 0x8>;
};

@ -435,6 +435,7 @@
pwm: pwm@11006000 {
compatible = "mediatek,mt7622-pwm";
reg = <0 0x11006000 0 0x1000>;
#pwm-cells = <2>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>;
clocks = <&topckgen CLK_TOP_PWM_SEL>,
<&pericfg CLK_PERI_PWM_PD>,

@ -125,8 +125,7 @@
};
watchdog: watchdog@1001c000 {
compatible = "mediatek,mt7986-wdt",
"mediatek,mt6589-wdt";
compatible = "mediatek,mt7986-wdt";
reg = <0 0x1001c000 0 0x1000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>;

@ -585,6 +585,15 @@
method = "smc";
};
clk13m: fixed-factor-clock-13m {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clocks = <&clk26m>;
clock-div = <2>;
clock-mult = <1>;
clock-output-names = "clk13m";
};
clk26m: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
@ -968,8 +977,7 @@
"mediatek,mt6765-timer";
reg = <0 0x10017000 0 0x1000>;
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&topckgen CLK_TOP_CLK13M>;
clock-names = "clk13m";
clocks = <&clk13m>;
};
iommu: iommu@10205000 {

@ -47,14 +47,12 @@
core5 {
cpu = <&cpu5>;
};
};
cluster1 {
core0 {
core6 {
cpu = <&cpu6>;
};
core1 {
core7 {
cpu = <&cpu7>;
};
};
@ -211,10 +209,12 @@
};
};
clk13m: oscillator-13m {
compatible = "fixed-clock";
clk13m: fixed-factor-clock-13m {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-frequency = <13000000>;
clocks = <&clk26m>;
clock-div = <2>;
clock-mult = <1>;
clock-output-names = "clk13m";
};
@ -330,8 +330,7 @@
};
watchdog: watchdog@10007000 {
compatible = "mediatek,mt8186-wdt",
"mediatek,mt6589-wdt";
compatible = "mediatek,mt8186-wdt";
mediatek,disable-extrst;
reg = <0 0x10007000 0 0x1000>;
#reset-cells = <1>;

@ -29,6 +29,15 @@
rdma4 = &rdma4;
};
clk13m: fixed-factor-clock-13m {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clocks = <&clk26m>;
clock-div = <2>;
clock-mult = <1>;
clock-output-names = "clk13m";
};
clk26m: oscillator0 {
compatible = "fixed-clock";
#clock-cells = <0>;
@ -149,19 +158,16 @@
core3 {
cpu = <&cpu3>;
};
};
cluster1 {
core0 {
core4 {
cpu = <&cpu4>;
};
core1 {
core5 {
cpu = <&cpu5>;
};
core2 {
core6 {
cpu = <&cpu6>;
};
core3 {
core7 {
cpu = <&cpu7>;
};
};
@ -531,8 +537,7 @@
"mediatek,mt6765-timer";
reg = <0 0x10017000 0 0x1000>;
interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&topckgen CLK_TOP_CSW_F26M_D2>;
clock-names = "clk13m";
clocks = <&clk13m>;
};
pwrap: pwrap@10026000 {
@ -575,6 +580,8 @@
compatible = "mediatek,mt8192-scp_adsp";
reg = <0 0x10720000 0 0x1000>;
#clock-cells = <1>;
/* power domain dependency not upstreamed */
status = "fail";
};
uart0: serial@11002000 {

@ -150,22 +150,20 @@
core3 {
cpu = <&cpu3>;
};
};
cluster1 {
core0 {
core4 {
cpu = <&cpu4>;
};
core1 {
core5 {
cpu = <&cpu5>;
};
core2 {
core6 {
cpu = <&cpu6>;
};
core3 {
core7 {
cpu = <&cpu7>;
};
};
@ -244,6 +242,15 @@
status = "disabled";
};
clk13m: fixed-factor-clock-13m {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clocks = <&clk26m>;
clock-div = <2>;
clock-mult = <1>;
clock-output-names = "clk13m";
};
clk26m: oscillator-26m {
compatible = "fixed-clock";
#clock-cells = <0>;
@ -683,8 +690,7 @@
};
watchdog: watchdog@10007000 {
compatible = "mediatek,mt8195-wdt",
"mediatek,mt6589-wdt";
compatible = "mediatek,mt8195-wdt";
mediatek,disable-extrst;
reg = <0 0x10007000 0 0x100>;
#reset-cells = <1>;
@ -701,7 +707,7 @@
"mediatek,mt6765-timer";
reg = <0 0x10017000 0 0x1000>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&topckgen CLK_TOP_CLK26M_D2>;
clocks = <&clk13m>;
};
pwrap: pwrap@10024000 {
@ -1410,6 +1416,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0x11e30000 0xe00>;
power-domains = <&spm MT8195_POWER_DOMAIN_SSUSB_PCIE_PHY>;
status = "disabled";
u2port1: usb-phy@0 {

@ -1666,7 +1666,7 @@
vin-supply = <&vdd_5v0_sys>;
};
vdd_cam_1v2: regulator-vdd-cam-1v8 {
vdd_cam_1v2: regulator-vdd-cam-1v2 {
compatible = "regulator-fixed";
regulator-name = "vdd-cam-1v2";
regulator-min-microvolt = <1200000>;

@ -137,7 +137,7 @@
#clock-cells = <0>;
clocks = <&gcc GCC_USB1_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_usb1_pipe_clk_src";
clock-output-names = "usb3phy_1_cc_pipe_clk";
};
};
@ -180,7 +180,7 @@
#clock-cells = <0>;
clocks = <&gcc GCC_USB0_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_usb0_pipe_clk_src";
clock-output-names = "usb3phy_0_cc_pipe_clk";
};
};
@ -197,9 +197,9 @@
status = "disabled";
};
pcie_qmp0: phy@86000 {
compatible = "qcom,ipq8074-qmp-pcie-phy";
reg = <0x00086000 0x1c4>;