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Apply Linux version 6.1.2 incremental patch to update kernel from version 6.1.1.

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main inf-kernel-0.0.0.2
inference 5 months ago
parent 060e729bfc
commit 058678a9d8
1088 changed files with 12888 additions and 6320 deletions
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12
Documentation/ABI/stable/sysfs-driver-dma-idxd
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@ -22,6 +22,7 @@ Date: Oct 25, 2019
KernelVersion: 5.6.0
Contact: dmaengine@vger.kernel.org
Description: The largest number of work descriptors in a batch.
It's not visible when the device does not support batch.
What: /sys/bus/dsa/devices/dsa<m>/max_work_queues_size
Date: Oct 25, 2019
@ -49,6 +50,8 @@ Description: The total number of read buffers supported by this device.
The read buffers represent resources within the DSA
implementation, and these resources are allocated by engines to
support operations. See DSA spec v1.2 9.2.4 Total Read Buffers.
It's not visible when the device does not support Read Buffer
allocation control.
What: /sys/bus/dsa/devices/dsa<m>/max_transfer_size
Date: Oct 25, 2019
@ -122,6 +125,8 @@ Contact: dmaengine@vger.kernel.org
Description: The maximum number of read buffers that may be in use at
one time by operations that access low bandwidth memory in the
device. See DSA spec v1.2 9.2.8 GENCFG on Global Read Buffer Limit.
It's not visible when the device does not support Read Buffer
allocation control.
What: /sys/bus/dsa/devices/dsa<m>/cmd_status
Date: Aug 28, 2020
@ -205,6 +210,7 @@ KernelVersion: 5.10.0
Contact: dmaengine@vger.kernel.org
Description: The max batch size for this workqueue. Cannot exceed device
max batch size. Configurable parameter.
It's not visible when the device does not support batch.
What: /sys/bus/dsa/devices/wq<m>.<n>/ats_disable
Date: Nov 13, 2020
@ -250,6 +256,8 @@ KernelVersion: 5.17.0
Contact: dmaengine@vger.kernel.org
Description: Enable the use of global read buffer limit for the group. See DSA
spec v1.2 9.2.18 GRPCFG Use Global Read Buffer Limit.
It's not visible when the device does not support Read Buffer
allocation control.
What: /sys/bus/dsa/devices/group<m>.<n>/read_buffers_allowed
Date: Dec 10, 2021
@ -258,6 +266,8 @@ Contact: dmaengine@vger.kernel.org
Description: Indicates max number of read buffers that may be in use at one time
by all engines in the group. See DSA spec v1.2 9.2.18 GRPCFG Read
Buffers Allowed.
It's not visible when the device does not support Read Buffer
allocation control.
What: /sys/bus/dsa/devices/group<m>.<n>/read_buffers_reserved
Date: Dec 10, 2021
@ -266,6 +276,8 @@ Contact: dmaengine@vger.kernel.org
Description: Indicates the number of Read Buffers reserved for the use of
engines in the group. See DSA spec v1.2 9.2.18 GRPCFG Read Buffers
Reserved.
It's not visible when the device does not support Read Buffer
allocation control.
What: /sys/bus/dsa/devices/group<m>.<n>/desc_progress_limit
Date: Sept 14, 2022

3
Documentation/ABI/testing/sysfs-bus-spi-devices-spi-nor
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@ -5,6 +5,9 @@ Contact: linux-mtd@lists.infradead.org
Description: (RO) The JEDEC ID of the SPI NOR flash as reported by the
flash device.
The attribute is not present if the flash doesn't support
the "Read JEDEC ID" command (9Fh). This is the case for
non-JEDEC compliant flashes.
What: /sys/bus/spi/devices/.../spi-nor/manufacturer
Date: April 2021

23
Documentation/admin-guide/sysctl/kernel.rst
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@ -1314,6 +1314,29 @@ watchdog work to be queued by the watchdog timer function, otherwise the NMI
watchdog — if enabled — can detect a hard lockup condition.
split_lock_mitigate (x86 only)
==============================
On x86, each "split lock" imposes a system-wide performance penalty. On larger
systems, large numbers of split locks from unprivileged users can result in
denials of service to well-behaved and potentially more important users.
The kernel mitigates these bad users by detecting split locks and imposing
penalties: forcing them to wait and only allowing one core to execute split
locks at a time.
These mitigations can make those bad applications unbearably slow. Setting
split_lock_mitigate=0 may restore some application performance, but will also
increase system exposure to denial of service attacks from split lock users.
= ===================================================================
0 Disable the mitigation mode - just warns the split lock on kernel log
and exposes the system to denials of service from the split lockers.
1 Enable the mitigation mode (this is the default) - penalizes the split
lockers with intentional performance degradation.
= ===================================================================
stack_erasing
=============

25
Documentation/devicetree/bindings/input/azoteq,iqs7222.yaml
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@ -473,9 +473,6 @@ patternProperties:
Specifies whether the event is to be interpreted as a key (1)
or a switch (5).
required:
- linux,code
additionalProperties: false
dependencies:
@ -501,7 +498,7 @@ patternProperties:
azoteq,slider-size:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
minimum: 1
maximum: 65535
description:
Specifies the slider's one-dimensional resolution, equal to the
@ -575,9 +572,9 @@ patternProperties:
linux,code: true
azoteq,gesture-max-ms:
multipleOf: 4
multipleOf: 16
minimum: 0
maximum: 1020
maximum: 4080
description:
Specifies the length of time (in ms) within which a tap, swipe
or flick gesture must be completed in order to be acknowledged
@ -585,9 +582,9 @@ patternProperties:
gesture applies to all remaining swipe or flick gestures.
azoteq,gesture-min-ms:
multipleOf: 4
multipleOf: 16
minimum: 0
maximum: 124
maximum: 496
description:
Specifies the length of time (in ms) for which a tap gesture must
be held in order to be acknowledged by the device.
@ -620,9 +617,6 @@ patternProperties:
GPIO, they must all be of the same type (proximity, touch or
slider gesture).
required:
- linux,code
additionalProperties: false
required:
@ -693,6 +687,7 @@ allOf:
properties:
azoteq,slider-size:
multipleOf: 16
minimum: 16
maximum: 4080
azoteq,top-speed:
@ -935,14 +930,14 @@ examples:
event-tap {
linux,code = <KEY_PLAYPAUSE>;
azoteq,gesture-max-ms = <600>;
azoteq,gesture-min-ms = <24>;
azoteq,gesture-max-ms = <400>;
azoteq,gesture-min-ms = <32>;
};
event-flick-pos {
linux,code = <KEY_NEXTSONG>;
azoteq,gesture-max-ms = <600>;
azoteq,gesture-dist = <816>;
azoteq,gesture-max-ms = <800>;
azoteq,gesture-dist = <800>;
};
event-flick-neg {

8
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
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@ -98,6 +98,10 @@ properties:
type: object
$ref: /schemas/regulator/qcom,spmi-regulator.yaml#
pwm:
type: object
$ref: /schemas/leds/leds-qcom-lpg.yaml#
patternProperties:
"^adc@[0-9a-f]+$":
type: object
@ -123,10 +127,6 @@ patternProperties:
type: object
$ref: /schemas/power/reset/qcom,pon.yaml#
"pwm@[0-9a-f]+$":
type: object
$ref: /schemas/leds/leds-qcom-lpg.yaml#
"^rtc@[0-9a-f]+$":
type: object
$ref: /schemas/rtc/qcom-pm8xxx-rtc.yaml#

46
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
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@ -14,9 +14,6 @@ description: |+
This PCIe host controller is based on the Synopsys DesignWare PCIe IP
and thus inherits all the common properties defined in snps,dw-pcie.yaml.
allOf:
- $ref: /schemas/pci/snps,dw-pcie.yaml#
properties:
compatible:
enum:
@ -61,7 +58,7 @@ properties:
- const: pcie
- const: pcie_bus
- const: pcie_phy
- const: pcie_inbound_axi for imx6sx-pcie, pcie_aux for imx8mq-pcie
- enum: [ pcie_inbound_axi, pcie_aux ]
num-lanes:
const: 1
@ -175,6 +172,47 @@ required:
- clocks
- clock-names
allOf:
- $ref: /schemas/pci/snps,dw-pcie.yaml#
- if:
properties:
compatible:
contains:
const: fsl,imx6sx-pcie
then:
properties:
clock-names:
items:
- {}
- {}
- {}
- const: pcie_inbound_axi
- if:
properties:
compatible:
contains:
const: fsl,imx8mq-pcie
then:
properties:
clock-names:
items:
- {}
- {}
- {}
- const: pcie_aux
- if:
properties:
compatible:
not:
contains:
enum:
- fsl,imx6sx-pcie
- fsl,imx8mq-pcie
then:
properties:
clock-names:
maxItems: 3
unevaluatedProperties: false
examples:

7
Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml
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@ -36,7 +36,7 @@ properties:
- const: mpu
interrupts:
maxItems: 1
maxItems: 2
clocks:
items:
@ -94,8 +94,9 @@ examples:
#interrupt-cells = <1>;
ranges = <0x81000000 0 0x40000000 0 0x40000000 0 0x00010000>,
<0x82000000 0 0x50000000 0 0x50000000 0 0x20000000>;
interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "intr";
interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi", "intr";
interrupt-map-mask = <0 0 0 7>;
interrupt-map =
<0 0 0 1 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH

46
Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
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@ -87,6 +87,8 @@ patternProperties:
"wifi_led" "led" 1, 2
"i2c" "i2c" 3, 4
"uart1_0" "uart" 7, 8, 9, 10
"uart1_rx_tx" "uart" 42, 43
"uart1_cts_rts" "uart" 44, 45
"pcie_clk" "pcie" 9
"pcie_wake" "pcie" 10
"spi1_0" "spi" 11, 12, 13, 14
@ -98,9 +100,11 @@ patternProperties:
"emmc_45" "emmc" 22, 23, 24, 25, 26, 27, 28, 29, 30,
31, 32
"spi1_1" "spi" 23, 24, 25, 26
"uart1_2" "uart" 29, 30, 31, 32
"uart1_2_rx_tx" "uart" 29, 30
"uart1_2_cts_rts" "uart" 31, 32
"uart1_1" "uart" 23, 24, 25, 26
"uart2_0" "uart" 29, 30, 31, 32
"uart2_0_rx_tx" "uart" 29, 30
"uart2_0_cts_rts" "uart" 31, 32
"spi0" "spi" 33, 34, 35, 36
"spi0_wp_hold" "spi" 37, 38
"uart1_3_rx_tx" "uart" 35, 36
@ -157,7 +161,7 @@ patternProperties:
then:
properties:
groups:
enum: [emmc, emmc_rst]
enum: [emmc_45, emmc_51]
- if:
properties:
function:
@ -221,8 +225,12 @@ patternProperties:
then:
properties:
groups:
enum: [uart1_0, uart1_1, uart1_2, uart1_3_rx_tx,
uart1_3_cts_rts, uart2_0, uart2_1, uart0, uart1, uart2]
items:
enum: [uart1_0, uart1_rx_tx, uart1_cts_rts, uart1_1,
uart1_2_rx_tx, uart1_2_cts_rts, uart1_3_rx_tx,
uart1_3_cts_rts, uart2_0_rx_tx, uart2_0_cts_rts,
uart2_1, uart0, uart1, uart2]
maxItems: 2
- if:
properties:
function:
@ -356,6 +364,27 @@ examples:
interrupt-parent = <&gic>;
#interrupt-cells = <2>;
pcie_pins: pcie-pins {
mux {
function = "pcie";
groups = "pcie_clk", "pcie_wake", "pcie_pereset";
};
};
pwm_pins: pwm-pins {
mux {
function = "pwm";
groups = "pwm0", "pwm1_0";
};
};
spi0_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
};
uart1_pins: uart1-pins {
mux {
function = "uart";
@ -363,6 +392,13 @@ examples:
};
};
uart1_3_pins: uart1-3-pins {
mux {
function = "uart";
groups = "uart1_3_rx_tx", "uart1_3_cts_rts";
};
};
uart2_pins: uart2-pins {
mux {
function = "uart";

4
Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml
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@ -30,7 +30,9 @@ properties:
maxItems: 1
"#pwm-cells":
const: 2
enum: [2, 3]
description:
The only flag supported by the controller is PWM_POLARITY_INVERTED.
microchip,sync-update-mask:
description: |

2
Documentation/devicetree/bindings/sound/qcom,wcd9335.txt
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@ -109,7 +109,7 @@ audio-codec@1{
reg = <1 0>;
interrupts = <&msmgpio 54 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "intr2"
reset-gpios = <&msmgpio 64 0>;
reset-gpios = <&msmgpio 64 GPIO_ACTIVE_LOW>;
slim-ifc-dev = <&wc9335_ifd>;
clock-names = "mclk", "native";
clocks = <&rpmcc RPM_SMD_DIV_CLK1>,

2
Documentation/devicetree/bindings/sound/rt5682.txt
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@ -46,7 +46,7 @@ Optional properties:
- realtek,dmic-clk-driving-high : Set the high driving of the DMIC clock out.
- #sound-dai-cells: Should be set to '<0>'.
- #sound-dai-cells: Should be set to '<1>'.
Pins on the device (for linking into audio routes) for RT5682:

4
Documentation/driver-api/spi.rst
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@ -25,8 +25,8 @@ hardware, which may be as simple as a set of GPIO pins or as complex as
a pair of FIFOs connected to dual DMA engines on the other side of the
SPI shift register (maximizing throughput). Such drivers bridge between
whatever bus they sit on (often the platform bus) and SPI, and expose
the SPI side of their device as a :c:type:`struct spi_master
<spi_master>`. SPI devices are children of that master,
the SPI side of their device as a :c:type:`struct spi_controller
<spi_controller>`. SPI devices are children of that master,
represented as a :c:type:`struct spi_device <spi_device>` and
manufactured from :c:type:`struct spi_board_info
<spi_board_info>` descriptors which are usually provided by

10
Documentation/fault-injection/fault-injection.rst
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@ -83,9 +83,7 @@ configuration of fault-injection capabilities.
- /sys/kernel/debug/fail*/times:
specifies how many times failures may happen at most. A value of -1
means "no limit". Note, though, that this file only accepts unsigned
values. So, if you want to specify -1, you better use 'printf' instead
of 'echo', e.g.: $ printf %#x -1 > times
means "no limit".
- /sys/kernel/debug/fail*/space:
@ -284,7 +282,7 @@ Application Examples
echo Y > /sys/kernel/debug/$FAILTYPE/task-filter
echo 10 > /sys/kernel/debug/$FAILTYPE/probability
echo 100 > /sys/kernel/debug/$FAILTYPE/interval
printf %#x -1 > /sys/kernel/debug/$FAILTYPE/times
echo -1 > /sys/kernel/debug/$FAILTYPE/times
echo 0 > /sys/kernel/debug/$FAILTYPE/space
echo 2 > /sys/kernel/debug/$FAILTYPE/verbose
echo Y > /sys/kernel/debug/$FAILTYPE/ignore-gfp-wait
@ -338,7 +336,7 @@ Application Examples
echo N > /sys/kernel/debug/$FAILTYPE/task-filter
echo 10 > /sys/kernel/debug/$FAILTYPE/probability
echo 100 > /sys/kernel/debug/$FAILTYPE/interval
printf %#x -1 > /sys/kernel/debug/$FAILTYPE/times
echo -1 > /sys/kernel/debug/$FAILTYPE/times
echo 0 > /sys/kernel/debug/$FAILTYPE/space
echo 2 > /sys/kernel/debug/$FAILTYPE/verbose
echo Y > /sys/kernel/debug/$FAILTYPE/ignore-gfp-wait
@ -369,7 +367,7 @@ Application Examples
echo N > /sys/kernel/debug/$FAILTYPE/task-filter
echo 100 > /sys/kernel/debug/$FAILTYPE/probability
echo 0 > /sys/kernel/debug/$FAILTYPE/interval
printf %#x -1 > /sys/kernel/debug/$FAILTYPE/times
echo -1 > /sys/kernel/debug/$FAILTYPE/times
echo 0 > /sys/kernel/debug/$FAILTYPE/space
echo 1 > /sys/kernel/debug/$FAILTYPE/verbose

2
Makefile
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@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 1
SUBLEVEL = 1
SUBLEVEL = 2
EXTRAVERSION =
NAME = Hurr durr I'ma ninja sloth

2
arch/Kconfig
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@ -635,7 +635,7 @@ config ARCH_SUPPORTS_SHADOW_CALL_STACK
config SHADOW_CALL_STACK
bool "Shadow Call Stack"
depends on ARCH_SUPPORTS_SHADOW_CALL_STACK
depends on DYNAMIC_FTRACE_WITH_REGS || !FUNCTION_GRAPH_TRACER
depends on DYNAMIC_FTRACE_WITH_ARGS || DYNAMIC_FTRACE_WITH_REGS || !FUNCTION_GRAPH_TRACER
help
This option enables the compiler's Shadow Call Stack, which
uses a shadow stack to protect function return addresses from

2
arch/alpha/include/asm/thread_info.h
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@ -75,7 +75,7 @@ register struct thread_info *__current_thread_info __asm__("$8");
/* Work to do on interrupt/exception return. */
#define _TIF_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
_TIF_NOTIFY_RESUME)
_TIF_NOTIFY_RESUME | _TIF_NOTIFY_SIGNAL)
/* Work to do on any return to userspace. */
#define _TIF_ALLWORK_MASK (_TIF_WORK_MASK \

4
arch/alpha/kernel/entry.S
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@ -469,8 +469,10 @@ entSys:
#ifdef CONFIG_AUDITSYSCALL
lda $6, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
and $3, $6, $3
#endif
bne $3, strace
#else
blbs $3, strace /* check for SYSCALL_TRACE in disguise */
#endif
beq $4, 1f
ldq $27, 0($5)
1: jsr $26, ($27), sys_ni_syscall

2
arch/arm/boot/dts/armada-370.dtsi
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@ -84,7 +84,7 @@
pcie2: pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
assigned-addresses = <0x82001000 0 0x80000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;

2
arch/arm/boot/dts/armada-375.dtsi
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@ -592,7 +592,7 @@
pcie1: pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;

4
arch/arm/boot/dts/armada-380.dtsi
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@ -89,7 +89,7 @@
/* x1 port */
pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
assigned-addresses = <0x82001000 0 0x40000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -118,7 +118,7 @@
/* x1 port */
pcie@3,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
assigned-addresses = <0x82001800 0 0x44000 0 0x2000>;
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;

18
arch/arm/boot/dts/armada-385-turris-omnia.dts
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@ -23,6 +23,12 @@
stdout-path = &uart0;
};
aliases {
ethernet0 = &eth0;
ethernet1 = &eth1;
ethernet2 = &eth2;
};
memory {
device_type = "memory";
reg = <0x00000000 0x40000000>; /* 1024 MB */
@ -483,7 +489,17 @@
};
};
/* port 6 is connected to eth0 */
ports@6 {
reg = <6>;
label = "cpu";
ethernet = <&eth0>;
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};

6
arch/arm/boot/dts/armada-385.dtsi
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@ -93,7 +93,7 @@
/* x1 port */
pcie2: pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
assigned-addresses = <0x82001000 0 0x40000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -121,7 +121,7 @@
/* x1 port */
pcie3: pcie@3,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
assigned-addresses = <0x82001800 0 0x44000 0 0x2000>;
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -152,7 +152,7 @@
*/
pcie4: pcie@4,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
assigned-addresses = <0x82002000 0 0x48000 0 0x2000>;
reg = <0x2000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;

6
arch/arm/boot/dts/armada-39x.dtsi
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@ -463,7 +463,7 @@
/* x1 port */
pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
assigned-addresses = <0x82001000 0 0x40000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -492,7 +492,7 @@
/* x1 port */
pcie@3,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
assigned-addresses = <0x82001800 0 0x44000 0 0x2000>;
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -524,7 +524,7 @@
*/
pcie@4,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
assigned-addresses = <0x82002000 0 0x48000 0 0x2000>;
reg = <0x2000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;

8
arch/arm/boot/dts/armada-xp-mv78230.dtsi
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@ -107,7 +107,7 @@
pcie2: pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -135,7 +135,7 @@
pcie3: pcie@3,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
assigned-addresses = <0x82001800 0 0x48000 0 0x2000>;
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -163,7 +163,7 @@
pcie4: pcie@4,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>;
reg = <0x2000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -191,7 +191,7 @@
pcie5: pcie@5,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
reg = <0x2800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;

16
arch/arm/boot/dts/armada-xp-mv78260.dtsi
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@ -122,7 +122,7 @@
pcie2: pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -150,7 +150,7 @@
pcie3: pcie@3,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
assigned-addresses = <0x82001800 0 0x48000 0 0x2000>;
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -178,7 +178,7 @@
pcie4: pcie@4,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>;
reg = <0x2000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -206,7 +206,7 @@
pcie5: pcie@5,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
reg = <0x2800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -234,7 +234,7 @@
pcie6: pcie@6,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x84000 0 0x2000>;
assigned-addresses = <0x82003000 0 0x84000 0 0x2000>;
reg = <0x3000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -262,7 +262,7 @@
pcie7: pcie@7,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x88000 0 0x2000>;
assigned-addresses = <0x82003800 0 0x88000 0 0x2000>;
reg = <0x3800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -290,7 +290,7 @@
pcie8: pcie@8,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>;
assigned-addresses = <0x82004000 0 0x8c000 0 0x2000>;
reg = <0x4000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
@ -318,7 +318,7 @@
pcie9: pcie@9,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
assigned-addresses = <0x82004800 0 0x42000 0 0x2000>;
reg = <0x4800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;

17
arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
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@ -162,16 +162,9 @@
#size-cells = <1>;
ranges;
/* LPC FW cycle bridge region requires natural alignment */
flash_memory: region@b8000000 {
no-map;
reg = <0xb8000000 0x04000000>; /* 64M */
};
/* 48MB region from the end of flash to start of vga memory */
ramoops@bc000000 {
ramoops@b3e00000 {
compatible = "ramoops";
reg = <0xbc000000 0x200000>; /* 16 * (4 * 0x8000) */
reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */
record-size = <0x8000>;
console-size = <0x8000>;
ftrace-size = <0x8000>;
@ -179,6 +172,12 @@
max-reason = <3>; /* KMSG_DUMP_EMERG */
};
/* LPC FW cycle bridge region requires natural alignment */
flash_memory: region@b4000000 {
no-map;
reg = <0xb4000000 0x04000000>; /* 64M */
};
/* VGA region is dictated by hardware strapping */
vga_memory: region@bf000000 {
no-map;

16
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
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@ -95,14 +95,9 @@
#size-cells = <1>;
ranges;
flash_memory: region@b8000000 {
no-map;
reg = <0xb8000000 0x04000000>; /* 64M */
};
ramoops@bc000000 {
ramoops@b3e00000 {
compatible = "ramoops";
reg = <0xbc000000 0x200000>; /* 16 * (4 * 0x8000) */
reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */
record-size = <0x8000>;
console-size = <0x8000>;
ftrace-size = <0x8000>;
@ -110,6 +105,13 @@
max-reason = <3>; /* KMSG_DUMP_EMERG */
};
/* LPC FW cycle bridge region requires natural alignment */
flash_memory: region@b4000000 {
no-map;
reg = <0xb4000000 0x04000000>; /* 64M */
};
/* VGA region is dictated by hardware strapping */
vga_memory: region@bf000000 {
no-map;
compatible = "shared-dma-pool";

2
arch/arm/boot/dts/dove.dtsi
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@ -139,7 +139,7 @@
pcie1: pcie@2 {
device_type = "pci";
status = "disabled";
assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
assigned-addresses = <0x82001000 0 0x80000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
clocks = <&gate_clk 5>;
marvell,pcie-port = <1>;

2
arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
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@ -366,7 +366,7 @@
spi-max-frequency = <20000000>;
spi-rx-bus-width = <2>;
label = "bmc";
partitions@80000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

2
arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
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@ -142,7 +142,7 @@
reg = <0>;
spi-rx-bus-width = <2>;
partitions@80000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

6
arch/arm/boot/dts/nuvoton-npcm730-kudo.dts
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@ -388,7 +388,7 @@
spi-max-frequency = <5000000>;
spi-rx-bus-width = <2>;
label = "bmc";
partitions@80000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
@ -422,7 +422,7 @@
reg = <1>;
spi-max-frequency = <5000000>;
spi-rx-bus-width = <2>;
partitions@88000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
@ -447,7 +447,7 @@
reg = <0>;
spi-max-frequency = <5000000>;
spi-rx-bus-width = <2>;
partitions@A0000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

4
arch/arm/boot/dts/nuvoton-npcm750-evb.dts
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@ -74,7 +74,7 @@
spi-rx-bus-width = <2>;
reg = <0>;
spi-max-frequency = <5000000>;
partitions@80000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
@ -135,7 +135,7 @@
spi-rx-bus-width = <2>;
reg = <0>;
spi-max-frequency = <5000000>;
partitions@A0000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

6
arch/arm/boot/dts/nuvoton-npcm750-runbmc-olympus.dts
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@ -107,7 +107,7 @@
reg = <0>;
spi-rx-bus-width = <2>;
partitions@80000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
@ -146,7 +146,7 @@
reg = <1>;
npcm,fiu-rx-bus-width = <2>;
partitions@88000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
@ -173,7 +173,7 @@
reg = <0>;
spi-rx-bus-width = <2>;
partitions@A0000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

2
arch/arm/boot/dts/qcom-apq8064.dtsi
Unescape Escape View File

@ -1615,7 +1615,7 @@
};
etb@1a01000 {
compatible = "coresight-etb10", "arm,primecell";
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0x1a01000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;

2
arch/arm/boot/dts/spear600.dtsi
Unescape Escape View File

@ -47,7 +47,7 @@
compatible = "arm,pl110", "arm,primecell";
reg = <0xfc200000 0x1000>;
interrupt-parent = <&vic1>;
interrupts = <12>;
interrupts = <13>;
status = "disabled";
};

1
arch/arm/boot/dts/stm32mp157a-dhcor-avenger96.dts
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@ -13,7 +13,6 @@
/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15xx-dhcor-som.dtsi"
#include "stm32mp15xx-dhcor-avenger96.dtsi"

2
arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi
Unescape Escape View File

@ -100,7 +100,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>;
gpio = <&gpioz 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};

11
arch/arm/mach-mmp/time.c
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@ -43,18 +43,21 @@
static void __iomem *mmp_timer_base = TIMERS_VIRT_BASE;
/*
* FIXME: the timer needs some delay to stablize the counter capture
* Read the timer through the CVWR register. Delay is required after requesting
* a read. The CR register cannot be directly read due to metastability issues
* documented in the PXA168 software manual.
*/
static inline uint32_t timer_read(void)
{
int delay = 100;
uint32_t val;
int delay = 3;
__raw_writel(1, mmp_timer_base + TMR_CVWR(1));
while (delay--)
cpu_relax();
val = __raw_readl(mmp_timer_base + TMR_CVWR(1));
return __raw_readl(mmp_timer_base + TMR_CVWR(1));
return val;
}
static u64 notrace mmp_read_sched_clock(void)

6
arch/arm64/boot/dts/apple/t8103.dtsi
Unescape Escape View File

@ -412,7 +412,7 @@
resets = <&ps_ans2>;
};
pcie0_dart_0: dart@681008000 {
pcie0_dart_0: iommu@681008000 {
compatible = "apple,t8103-dart";
reg = <0x6 0x81008000 0x0 0x4000>;
#iommu-cells = <1>;
@ -421,7 +421,7 @@
power-domains = <&ps_apcie_gp>;
};
pcie0_dart_1: dart@682008000 {
pcie0_dart_1: iommu@682008000 {
compatible = "apple,t8103-dart";
reg = <0x6 0x82008000 0x0 0x4000>;
#iommu-cells = <1>;
@ -430,7 +430,7 @@
power-domains = <&ps_apcie_gp>;
};
pcie0_dart_2: dart@683008000 {
pcie0_dart_2: iommu@683008000 {
compatible = "apple,t8103-dart";
reg = <0x6 0x83008000 0x0 0x4000>;
#iommu-cells = <1>;

3
arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
Unescape Escape View File

@ -125,9 +125,12 @@
/delete-property/ mrvl,i2c-fast-mode;
status = "okay";
/* MCP7940MT-I/MNY RTC */
rtc@6f {
compatible = "microchip,mcp7940x";
reg = <0x6f>;
interrupt-parent = <&gpiosb>;
interrupts = <5 0>; /* GPIO2_5 */
};
};

12
arch/arm64/boot/dts/mediatek/mt2712-evb.dts
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@ -26,14 +26,14 @@
stdout-path = "serial0:921600n8";
};
cpus_fixed_vproc0: fixedregulator@0 {
cpus_fixed_vproc0: regulator-vproc-buck0 {
compatible = "regulator-fixed";
regulator-name = "vproc_buck0";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
cpus_fixed_vproc1: fixedregulator@1 {
cpus_fixed_vproc1: regulator-vproc-buck1 {
compatible = "regulator-fixed";
regulator-name = "vproc_buck1";
regulator-min-microvolt = <1000000>;
@ -50,7 +50,7 @@
id-gpio = <&pio 14 GPIO_ACTIVE_HIGH>;
};
usb_p0_vbus: regulator@2 {
usb_p0_vbus: regulator-usb-p0-vbus {
compatible = "regulator-fixed";
regulator-name = "p0_vbus";
regulator-min-microvolt = <5000000>;
@ -59,7 +59,7 @@
enable-active-high;
};
usb_p1_vbus: regulator@3 {
usb_p1_vbus: regulator-usb-p1-vbus {
compatible = "regulator-fixed";
regulator-name = "p1_vbus";
regulator-min-microvolt = <5000000>;
@ -68,7 +68,7 @@
enable-active-high;
};
usb_p2_vbus: regulator@4 {
usb_p2_vbus: regulator-usb-p2-vbus {
compatible = "regulator-fixed";
regulator-name = "p2_vbus";
regulator-min-microvolt = <5000000>;
@ -77,7 +77,7 @@
enable-active-high;
};
usb_p3_vbus: regulator@5 {
usb_p3_vbus: regulator-usb-p3-vbus {
compatible = "regulator-fixed";
regulator-name = "p3_vbus";
regulator-min-microvolt = <5000000>;

22
arch/arm64/boot/dts/mediatek/mt2712e.dtsi
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@ -160,70 +160,70 @@
#clock-cells = <0>;
};
clk26m: oscillator@0 {
clk26m: oscillator-26m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
clock-output-names = "clk26m";
};
clk32k: oscillator@1 {
clk32k: oscillator-32k {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "clk32k";
};
clkfpc: oscillator@2 {
clkfpc: oscillator-50m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
clock-output-names = "clkfpc";
};
clkaud_ext_i_0: oscillator@3 {
clkaud_ext_i_0: oscillator-aud0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <6500000>;
clock-output-names = "clkaud_ext_i_0";
};
clkaud_ext_i_1: oscillator@4 {
clkaud_ext_i_1: oscillator-aud1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <196608000>;
clock-output-names = "clkaud_ext_i_1";
};
clkaud_ext_i_2: oscillator@5 {
clkaud_ext_i_2: oscillator-aud2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <180633600>;
clock-output-names = "clkaud_ext_i_2";
};
clki2si0_mck_i: oscillator@6 {
clki2si0_mck_i: oscillator-i2s0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <30000000>;
clock-output-names = "clki2si0_mck_i";
};
clki2si1_mck_i: oscillator@7 {
clki2si1_mck_i: oscillator-i2s1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <30000000>;
clock-output-names = "clki2si1_mck_i";
};
clki2si2_mck_i: oscillator@8 {
clki2si2_mck_i: oscillator-i2s2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <30000000>;
clock-output-names = "clki2si2_mck_i";
};
clktdmin_mclk_i: oscillator@9 {
clktdmin_mclk_i: oscillator-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <30000000>;
@ -266,7 +266,7 @@
reg = <0 0x10005000 0 0x1000>;
};
pio: pinctrl@10005000 {
pio: pinctrl@1000b000 {
compatible = "mediatek,mt2712-pinctrl";
reg = <0 0x1000b000 0 0x1000>;
mediatek,pctl-regmap = <&syscfg_pctl_a>;

8
arch/arm64/boot/dts/mediatek/mt6779.dtsi
Unescape Escape View File

@ -88,14 +88,14 @@
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW 0>;
};
clk26m: oscillator@0 {
clk26m: oscillator-26m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
clock-output-names = "clk26m";
};
clk32k: oscillator@1 {
clk32k: oscillator-32k {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
@ -117,7 +117,7 @@
compatible = "simple-bus";
ranges;
gic: interrupt-controller@0c000000 {
gic: interrupt-controller@c000000 {
compatible = "arm,gic-v3";
#interrupt-cells = <4>;
interrupt-parent = <&gic>;
@ -138,7 +138,7 @@
};
sysirq: intpol-controller@0c53a650 {
sysirq: intpol-controller@c53a650 {
compatible = "mediatek,mt6779-sysirq",
"mediatek,mt6577-sysirq";
interrupt-controller;

2
arch/arm64/boot/dts/mediatek/mt6797.dtsi
Unescape Escape View File

@ -95,7 +95,7 @@
};
};
clk26m: oscillator@0 {
clk26m: oscillator-26m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;

16
arch/arm64/boot/dts/mediatek/mt7986a.dtsi
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@ -14,7 +14,7 @@
#address-cells = <2>;
#size-cells = <2>;
clk40m: oscillator@0 {
clk40m: oscillator-40m {
compatible = "fixed-clock";
clock-frequency = <40000000>;
#clock-cells = <0>;
@ -112,6 +112,12 @@
#clock-cells = <1>;
};
wed_pcie: wed-pcie@10003000 {
compatible = "mediatek,mt7986-wed-pcie",
"syscon";
reg = <0 0x10003000 0 0x10>;
};
topckgen: topckgen@1001b000 {
compatible = "mediatek,mt7986-topckgen", "syscon";
reg = <0 0x1001B000 0 0x1000>;